Difference between revisions of "Plugin:Intel PMU"
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Kwiatrowski (talk | contribs) (Created page with "{{Infobox Plugin | Name=Intel PMU | Type=read | Callbacks={{Callback|config}}, {{Callback|init}}, {{Callback|read}}, {{Callback|shutdown}} | Status={{supported}} | F...") |
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== Example graphs == | == Example graphs == | ||
| − | [ | + | [[File:Graph_pmu_instructions.png]] |
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| + | Instructions (counter) corresponding to perf metric PERF_COUNT_HW_INSTRUCTIONS. | ||
== History == | == History == | ||
Revision as of 14:25, 19 March 2019
| Intel PMU plugin | |
|---|---|
| Type: | read |
| Callbacks: | config, init, read, shutdown |
| Status: | supported |
| First version: | 5.8 |
| Copyright: | 2017–2018 Intel Corporation |
| License: | MIT license |
| Manpage: | collectd.conf(5) |
| List of Plugins | |
Performance counters are CPU hardware registers that count hardware events such as instructions executed, cache-misses suffered, or branches mispredicted. They form a basis for profiling applications to trace dynamic control flow and identify hotspots. Linux perf interface provides rich generalized abstractions over hardware specific capabilities. The intel_pmu plugin collects performance counters data on Intel CPUs using Linux perf interface. All events are reported on a per core basis. For a full description of available options please refer to the collectd.conf(5) manual page.
Synopsis
<Plugin intel_pmu> ReportHardwareCacheEvents true ReportKernelPMUEvents true ReportSoftwareEvents true EventList "/var/cache/pmu/GenuineIntel-6-2D-core.json" HardwareEvents "L2_RQSTS.CODE_RD_HIT,L2_RQSTS.CODE_RD_MISS" "L2_RQSTS.ALL_CODE_RD" Cores "0" "1,35" "[12-17]" </Plugin>
Example graphs
Instructions (counter) corresponding to perf metric PERF_COUNT_HW_INSTRUCTIONS.
History
Cores option is available since release 5.8.1.
